CPU - Central Processing Unit
Microprocessor = CPU but smaller and can perform less functions
Fetch-decode-execute cycle = Cycle through which data and instructions are processed
- Program Counter: holds address of next instruction
- Memory Access Register: holds address of data to be fetched
- Memory Data Register: holds data from address at MAR
- Current Instruction Register: Holds current instruction being executed
- Control Unit: Decodes instruction using instruction set, sends control signals manages transfer of data
- Accumulator - Stores interim values of the ALU

Data and information → Computer [ through input devices ] → Stored in RAM [Random Access Memory]
!! If user wants to open a file from harddrive, data will be brought from hard drive to RAM !!
Fetch Stage -
- Program counter [PC] holds the address of the next instruction to be executed
- The address is copied into MAR [Memory Address Register] through the address bus
- Instruction/data at the address in MAR is copied into MDR [Memory Data Register] FROM RAM
- Instruction/data in MDR is copied into the CIR [Current Instruction Register]
- PC is incremented so it has the address of the next instruction